Battery power budget analysis — every microamp counts when targeting 2+ year coin cell runtime
Getting 5 years from a coin cell requires systematic optimisation at every level: MCU selection, sleep mode architecture, peripheral power gating, radio duty cycling, and firmware design.
State | Current | Duty | Avg μA Deep sleep | 3 μA | 98.8% | 3.0 BLE advertise | 4 mA | 0.8% | 32.0 BLE connected | 6 mA | 0.15% | 9.0 Button wakeup | 5 mA | 0.25% | 12.5 ----------------------------------------- Total: ~57 μA → 2+ years on CR2032 ✓
Design firmware as an event-driven state machine spending 99%+ of time in deepest sleep. Wake only on hardware interrupt and return to sleep as fast as possible.
esp_sleep_enable_timer_wakeup(30 * 1000000ULL); esp_sleep_enable_ext0_wakeup(BUTTON_PIN, 0); esp_deep_sleep_start(); // ~8μA
One of the most impactful techniques for extending battery life is cutting power to peripherals that are not in use. A temperature and humidity sensor drawing 1mA during measurement can be powered through a P-MOSFET switched by a GPIO pin. During deep sleep, the sensor receives no power at all. At a 5-second measurement interval with a 50ms active period, this reduces sensor contribution to average current by 99%.
Similarly, NOR flash chips draw 30–100μA in standby. Calling spi_flash_deep_sleep() before entering MCU sleep mode eliminates this entirely. SPI flash in deep sleep draws under 1μA on most parts. On a device with a 2-year battery target, these microamp savings compound into months of additional runtime.
The choice between an LDO (linear regulator) and a switching regulator (SMPS) is nuanced for ultra-low power designs. At load currents above 20mA, a switching regulator is almost always more efficient — 85–95% vs 60–80% for an LDO. But at the microamp loads seen during deep sleep, the regulator’s quiescent current (Iq) dominates. Some LDOs have Iq below 1μA; switching regulators rarely achieve below 5μA Iq.
The practical solution: use a switching regulator for the main supply rail during active operation, and choose a regulator with a low-power mode or use a separate LDO for the always-on domain. On GEST v2, we use a TPS63036 buck-boost for the main rail and a TLV733P LDO (1μA Iq) for the always-on RTC and wake logic.
Hardware optimisation only goes so far. Firmware discipline is equally important. Every millisecond spent with the CPU running at full speed costs battery. After waking from sleep, process data as quickly as possible and return to sleep. Avoid spin-wait loops — use interrupt-driven or DMA-based peripheral communication. Log aggressively during development to understand your actual wake time vs expected wake time; we have found bugs that caused 10x longer wake times than intended, halving projected battery life.
Battery-powered IoT design is a discipline that touches every layer of the product — from component selection and PCB layout to firmware architecture and factory test procedures. At FSS we design both hardware and firmware in the same team, which is the only way to achieve the tight co-optimisation that multi-year battery life requires.
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