How to Design a Custom IoT PCB: From Schematic to Fabrication

📅 October 2025 ⏳ 4 min read FSS Engineering Team

MCU

Custom 4-layer IoT PCB — RF section, power management, and MCU carefully partitioned for signal integrity

A custom PCB is the heart of every IoT product. Getting the design right means reliable signal integrity, good RF performance, long battery life, and a manufacturable board. Getting it wrong means respins, certification failures, and delayed ship dates.

Schematic Capture

Start with the datasheet application circuit for your MCU. Then add: decoupling capacitors on every power pin (100nF ceramic + 10μF bulk per rail), reset circuit, programming/debug interface (SWD for STM32, JTAG/USB for ESP32), and status LEDs with current-limiting resistors.

RF Antenna Layout

RF section is where most first-time designers make mistakes:

Keep out zone — No copper (including GND pour) under the antenna. Follow the module’s recommended keepout exactly.
50Ω trace — Calculate trace width for 50Ω on your stackup (typically 2.9mm on 0.8mm FR4).
Ground plane continuity — Solid ground plane under RF section except the keepout. Stitching vias around the perimeter.

// Antenna keepout — ESP32-WROOM-32

// Module datasheet: 3.5mm keepout from PCB edge
// No copper pours, traces, or vias in this zone
// Recommended: PCB notch under antenna for better radiation
// Test with a spectrum analyser before certification

Power Design

For battery-powered IoT: LDO for low-current loads (<50mA), switching regulator for higher loads. Separate analog and digital power domains with ferrite beads. Place bulk capacitors close to the regulator output.

📐 Layer stack

4-layer stack for most IoT designs: Top (signals + components), GND plane, PWR plane, Bottom (signals + components). This gives solid ground reference for RF and controlled impedance for high-speed signals. 2-layer is fine for simple low-frequency designs without RF.

DFM Before Sending to Fab

Run DRC in your EDA tool, then manually verify: minimum trace width/spacing for your fab, minimum via drill size, fiducials on both layers, courtyard clearances, and correct orientation marks on polarised components. First respins are almost always DFM issues.

Signal Integrity for High-Speed Digital Interfaces

Modern IoT SoCs include high-speed peripherals — USB 2.0, SPI at 40MHz+, I2S for audio, SDIO for WiFi. Each has specific PCB layout requirements to maintain signal integrity. For USB 2.0, maintain 90Ω differential impedance on the D+/D- pair; calculate trace width and spacing for your stackup using a controlled impedance calculator. Route differential pairs as matched-length pairs with less than 5mil length mismatch. No vias on differential pairs — route on the same layer end-to-end.

For SPI at speeds above 20MHz, treat traces as transmission lines: match source impedance with series resistors (typically 22–47Ω), keep traces short (under 5cm), and add a ground plane directly beneath signal layers to control impedance. Run the clock trace shorter than data traces to compensate for routing delay differences.

Thermal Management

ESP32-S3 dissipates up to 500mW under full WiFi load. In an enclosed enclosure without airflow, this raises the local PCB temperature by 15–25°C above ambient — potentially pushing the chip beyond its 85°C junction temperature limit in hot environments. Thermal vias beneath the exposed pad of the SoC transfer heat to the ground plane on lower layers. A ground pour on all unused areas of all layers acts as a distributed heat spreader.

For power management ICs (switching regulators, LDOs), calculate the thermal resistance from junction to ambient using the IC’s datasheet thermal resistance values (θJC and θJA). Ensure the expected junction temperature remains below the maximum rating with 20°C margin across your entire operating temperature range. Insufficient thermal margin is a common cause of production failures in hot climates or direct sunlight installations.

Manufacturing Documentation Package

Delivering complete, correct manufacturing documentation is as important as the design itself. The manufacturing package must include: Gerber RS-274X files for all layers (copper, soldermask, silkscreen, drill, board outline), drill file in Excellon format, pick-and-place file in CSV format (component reference, X/Y coordinates, rotation, layer), bill of materials in CSV with manufacturer part numbers and approved alternatives for every component, assembly drawings showing component placement and any special instructions, and PCB specification sheet (stackup, controlled impedance requirements, surface finish, silkscreen requirements).

Errors in manufacturing documentation cause production delays that cost more than the entire PCB design phase. Use a design release checklist and have a second engineer verify the package before sending to the CM. Run a final DRC against your CM’s specific design rules — different CMs have different minimum feature sizes, and what is acceptable at one fab may cause yield problems at another.